Clash Toolkit

Community extension — maintained by Lucas Bollen (QBayLogic). Not an official release of the Clash project.

Synthesize Verilog from Haskell functions using Clash, explore the result with Yosys, and place-and-route for ECP5, iCE40, and Gowin FPGAs with nextpnr — all from inside VS Code.

Haskell source → Clash (Verilog) → Yosys (synthesis) → nextpnr (place & route)

Quick Start

1. Install the extension. You need Clash and HLS available (e.g. via nix develop). Yosys and nextpnr are optional — if a command needs one that isn't on your PATH, the extension shows a checklist of tools (missing ones pre-checked, found ones unchecked) and downloads the checked tools from a self-contained OSS CAD Suite build into its own storage. You choose, per tool, which to manage.
2. Open a Clash project, make sure HLS is running.
3. Open a .hs file → Ctrl+. on a monomorphic function → Synthesize (or use the Command Palette).

Run Clash: Check Toolchain to verify tool availability, or Clash: Install Toolchain to download the bundled toolchain up front. A tool you already have on your PATH is always used in preference to the managed copy.

Documentation

Full documentation is published at lmbollen.github.io/clash-toolkit, built from the book/ directory with mdbook. To read it locally:

mdbook serve book   # http://localhost:3000

Highlights:

• Getting Started — prerequisites, first synthesis
• Commands — every command and what it runs
• The Sidebar — the one view, its three sections, and what their rows mean
• Circuit Diagrams — schematics and drilling into components
• Configuration — settings reference
• Architecture Overview — source layout and data flow
• Developer Setup — building, running, Nix shell
• Testing — test suites and how to run them

License

BSD 2-Clause © 2026 Lucas Bollen.